Vol. 12 No. 2 (2026): WiPiEC Journal — Special Issue

Published: 2026-08-25

Full Issue

Full Paper

Autotuned Distribution of Multi-DNN Workloads on Multi-Accelerator SoCs

Federico Nicolás Peccia, Avik Bhatnagar, Oliver Bringmann

8
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Clock-glitch Fault Characterization by Timing Comparison with Laser Fault Injection

Ludovic Claudepierre, Edna Rocio Ferrucho-Alvarez, Laurent Le Brizoual, Laurent Pichon

8
- PDF
Dolunay: Architectural Support for Independent Thread Scheduling in a RISC-V SIMT Accelerator

Ahmet Zahit Can, Erkan Uslu

8
- PDF
Operation Count as a Performance Predictor: An Empirical Study of Lightweight AEAD Schemes

Raphaël Wintersdorff, Renaud Pacalet, Laurent Sauvage

8
- PDF
Instruction Flow Amplifier: A Novel Architecture for In-Order Processor Front-End Optimization

João Antônio Temochko Andre, Alexandre Beletti Ferreira

7
- PDF
A Dual-Head Model for Host based Intrusion Detection on System-Call traces

Matthias Dippold, Sofia Maragkou, Matthias Wess, Thilo Sauter, Grigorios Chrysos, Sotiris Ioannidis

8
- PDF
A Compiler-Aware Framework for Partitioned Neural Network Inference on FPGA DPUs

Federico Buccellato, Luca Mannini, Corrado De Sio

8
- PDF
An Exploratory Study on Code Smells Detection and Refactoring using LLMs

Giorgia Paisi, Francesca Arcelli Fontana, Bartosz Walter

7
- PDF
Microservice Decomposition using Many-Objective Optimization

Vadim Peczyński, Joanna Szłapczyńska

10
- PDF
Knowledge Retrieval Architectures for AI-Assisted Software Development: From Static Context to Autonomous Development Agents

Norbert Fijałek, Ilona Bluemke, Piotr Gawrysiak

8
- PDF
SIAM DSL: Accessible Structured Text for Bridging the Architecture-Impact Gap in Cyber-Physical Production Systems

Stefan Biffl, Tobias Bein, Sebastian Kropatschek, Kristof Meixner, Arndt Lüder

8
- PDF
Large Language Models for Software Architecture Design Support in Self-Adaptive Systems: Early Insights from an Exploratory Systematic Review

Nadeem Abbas, Nazia Shahzadi

8
- PDF

Short Paper

Study of PicoTDC Performance for FIT Detector Upgrade in ALICE Experiment at CERN

Łukasz Drzensla, Sebastian Koryciak, Olksandr Savchenko, Paweł Russek

6
- PDF
Design and Implementation of Three-stage RISC-V Microprocessor for Education

Jan Ber

5
- PDF
A Low-Power ADC-Free Resistive Sensor Readout Circuit for μC-Based Microsystems

João Maia Aguiar, José Machado da Silva

6
- PDF

Vol. 12 No. 2 (2026): WiPiEC Journal — Special Issue

Full Issue

Full Paper

Autotuned Distribution of Multi-DNN Workloads on Multi-Accelerator SoCs

Clock-glitch Fault Characterization by Timing Comparison with Laser Fault Injection

Dolunay: Architectural Support for Independent Thread Scheduling in a RISC-V SIMT Accelerator

Operation Count as a Performance Predictor: An Empirical Study of Lightweight AEAD Schemes

Instruction Flow Amplifier: A Novel Architecture for In-Order Processor Front-End Optimization

A Dual-Head Model for Host based Intrusion Detection on System-Call traces

A Compiler-Aware Framework for Partitioned Neural Network Inference on FPGA DPUs

An Exploratory Study on Code Smells Detection and Refactoring using LLMs

Microservice Decomposition using Many-Objective Optimization

Knowledge Retrieval Architectures for AI-Assisted Software Development: From Static Context to Autonomous Development Agents

SIAM DSL: Accessible Structured Text for Bridging the Architecture-Impact Gap in Cyber-Physical Production Systems

Large Language Models for Software Architecture Design Support in Self-Adaptive Systems: Early Insights from an Exploratory Systematic Review

Short Paper

Study of PicoTDC Performance for FIT Detector Upgrade in ALICE Experiment at CERN

Design and Implementation of Three-stage RISC-V Microprocessor for Education

A Low-Power ADC-Free Resistive Sensor Readout Circuit for μC-Based Microsystems

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WiPiEC Journal Vol. 12 No. 2 Special Issue Published

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