BER, J. Design and Implementation of Three-stage RISC-V Microprocessor for Education. WiPiEC Journal - Works in Progress in Embedded Computing Journal, [S. l.], v. 12, n. 2, p. 5, 2026. DOI: 10.64552/wipiec.v12i2.150. Disponível em: https://wipiec.digitalheritage.me/index.php/wipiecjournal/article/view/150. Acesso em: 26 aug. 2026.