TEMOCHKO ANDRE, J. A.; BELETTI FERREIRA, A. Instruction Flow Amplifier: A Novel Architecture for In-Order Processor Front-End Optimization. WiPiEC Journal - Works in Progress in Embedded Computing Journal, [S. l.], v. 12, n. 2, p. 7, 2026. DOI: 10.64552/wipiec.v12i2.139. Disponível em: https://wipiec.digitalheritage.me/index.php/wipiecjournal/article/view/139. Acesso em: 26 aug. 2026.